A variety of integrated circuit packaging techniques exist which have different benefits for different applications. For example, a ball grid array (BGA) package is one type of packaging for integrated circuits. In a BGA package, a surface of the package provides pins to interconnect with other circuits (e.g., via a grid of solder balls). The BGA package is not mounted on top of other packages, and generally sits on a circuit board (e.g., a motherboard). Another example of packaging for integrated circuits is a package on package (PoP) configuration. In PoP configurations, two or more packages are positioned on top of one another. PoP configurations can be useful for compact computing applications (e.g., smartphones, tablets, netbooks, cameras, and other compact electronic devices) due to the ability to vertically stack integrated circuit packages, and achieve a high density of integrated circuits. PoP configurations can use solder balls like BGA packages, but due to the stacked nature, PoP configurations generally have pins on the periphery of the package instead of spread over an entire surface of the package, and therefore have less area for pins. Other packaging types also exist which allow for varying numbers of pins and circuit density.
Memory devices can be packaged via different methods, but packaging configurations for a given memory device are limited by, for example, the number of available pins. A given memory device generally requires a particular number of pins for uses such as the command/address bus, the data bus, and/or other pins such as control pins. For example, if a given memory device requires a certain number of pins, and a PoP configuration will make available fewer pins than necessary for that memory device, then a PoP configuration may not be used for that memory device. Therefore, with current technology, a given memory device may have limited packaging options, and therefore be used in limited computing applications.
Descriptions of certain details and implementations follow, including a description of the figures, which may depict some or all of the embodiments described below, as well as discussing other potential embodiments or implementations of the inventive concepts presented herein.